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 STM1810 STM1811 STM1812 STM1813 STM1815 STM1816 STM1817 STM1818
Low power reset circuit
Features

Precision monitoring of 3 V , 3.3 V, and 5 V supply voltages Four output configurations: - - - - Push-Pull, Active-High (STM1812,1817) Push-Pull, Active-Low (STM1810,1815) Open Drain, Active-Low (STM1811,1816) Open Drain, Active-Low with PushButton Detect (STM1813,1818)
SOT23-3 (WX)

Reset pulse width - 100 ms (min) Low supply current - 4 A (typ) Guaranteed assertion down to VCC = 1.0 V (0 C to 105 C) Factory-trimmed reset thresholds of 2.55 V, 2.88 V, 3.06 V, 4.37 V, and 4.62 V (typ) Power supply transient immunity Push-button/manual reset detect (STM1813/1818) Device summary
5V (1) 3.3 V/ 3.0 V Active-Low Active-Low Active-High RESET RESET RESET (Push-Pull) (Open Drain) (Push-Pull) (1) Active-Low RESET (Open Drain, Bidirectional, with MR Detect)

Operating temperature: -40 C to 105 C 2.5 % reset threshold accuracy: (-40 C to 105 C) Available in the SOT23-3 package Fully compatible with DS181x and MXD181x products.
Table 1.
Order codes STM1810L/M STM1811L/M STM1812L/M STM1813L/M STM1815T/S/R STM1816T/S/R STM1817T/S/R STM1818T/S/R
1. Active-low RST with internal pull-up resistor.
August 2007
Rev 7
1/25
www.st.com 1
Contents
STM1810/1811/1812/1813/1815/1816/1817/1818
Contents
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1 1.2 Functional block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.2.1 1.2.2 1.2.3 1.2.4 1.2.5 1.2.6 Active-low RST output (push-pull) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Active-low RST output (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Active-high RST output (push-pull) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Active-low RST output (open drain with internal 5.5 k pull-up) with manual reset detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 2.2 2.3 2.4 2.5 Reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Push-button detect reset (STM1813/1818) . . . . . . . . . . . . . . . . . . . . . . . . 9 Interfacing to bidirectional microcontrollers (MCU's) . . . . . . . . . . . . . . . . . 9 Negative going VCC transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Valid RST output down to VCC = 0 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3 4 5 6 7 8
Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2/25
STM1810/1811/1812/1813/1815/1816/1817/1818
List of tables
List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 STM1810/STM1815 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 STM1811/STM1816 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 STM1812/STM1817 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 STM1813/STM1818 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SOT23-3 - 3-lead small outline transistor package mechanical data. . . . . . . . . . . . . . . . . 21 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3/25
List of figures
STM1810/1811/1812/1813/1815/1816/1817/1818
List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 SOT23-3 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Push-pull active-low output (STM1810/1812/1815/1817) . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Open drain, active-low output (STM1811/1816) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Open drain, active-low output (bidirectional, manual reset detect, STM1813/1818) . . . . . . 7 Reset timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Push-button manual reset with MR detect (STM1813/1818) . . . . . . . . . . . . . . . . . . . . . . . 10 Manual reset timing diagram, switch bounce/debounce (STM1813/1818) . . . . . . . . . . . . . 11 Interfacing MCUs with bidirectional reset pins (RST, open drain, STM1811/1816) . . . . . . 11 Valid reset (RST) output down to VCC = 0 V (push-pull). . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Valid reset (RST) output down to V CC = 0 V (push-pull). . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Supply current vs. temperature (no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Normalized reset time-out period (trec) vs. temperature - VOD = VTH - VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 VCC-to-reset output delay vs. temperature - VOD = VTH - VCC . . . . . . . . . . . . . . . . . . . . . 14 Voltage output low vs. I SINK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Voltage output high vs. ISOURCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Normalized reset threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Max transient duration NOT causing reset pulse vs. reset threshold overdrive . . . . . . . . . 16 AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 SOT23-3 - 3-lead small outline transistor package outline . . . . . . . . . . . . . . . . . . . . . . . . 20
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STM1810/1811/1812/1813/1815/1816/1817/1818
Description
1
Description
STM181x devices are low power reset devices used to monitor power supplies for microcontrollers. They perform a single function: asserting a reset signal whenever V CC supply voltage drops below a preset value and keeping it asserted until VCC has risen above the preset threshold for a minimum period of time (trec ). They provide excellent circuit reliability without additional external components when used with +3.0 V / +3.3 V (STM1815-STM1818), and +5 V (STM1810-STM1813) power supply systems. A precision voltage reference and comparator monitors the VCC input for an out-of-tolerance condition. When an invalid V CC condition occurs, the reset output (RST) is forced low (or high in the case of RST) and remains asserted for t rec after VCC rises above the reset threshold. The STM1813/1818 also keep reset asserted for trec after the output is momentarily pulled to ground by an external push-button switch. The STM1812 and STM1817 have an active-high, push-pull output. The STM1810 and STM1815 (push-pull) and STM1811, STM1813, STM1816, and STM1818 (Open Drain) have an active-low RST output. The open drain devices (STM1811/STM1813/STM1816/STM1818) also have an internal pull-up resistor to VCC. The STM1813 and STM1818 feature a debounced manual reset feature that asserts a reset if the RST pin is pulled low for more than 1.5 s. When used to initiate manual reset, RST debounces signals from devices such as mechanical switches. For devices with this feature, the release of the external switch triggers the reset period. The STM181x devices are guaranteed to output the correct logic state for VCC down to 1.0 V (0 C to +105 C). They also provide a reset comparator designed to ignore fast transients on V CC. Reset thresholds are available between +2.55 V and +4.62 V. These small, low power devices are ideal for use in portable equipment. All are available in the space-saving 3-pin SOT23 package, and are specified from -40 C to +105 C. Figure 4 shows a typical hardware hookup for STM181x devices to a Microcontroller.
Figure 2.
Logic diagram
VCC
STM181x
RST (RST)(1)
VSS
AI09648
1. For STM1812, STM1817.
5/25
Description Table 2.
VSS RST RST(1) VCC
STM1810/1811/1812/1813/1815/1816/1817/1818 Signal names
Ground Active-low Reset Output Active-high Reset Output Supply Voltage and Input for Reset Threshold Monitor
1. For STM1812, STM1817.
Figure 3.
SOT23-3 connections
RST (RST) VCC
1 2
3
VSS
AI09649
2. RST for STM1812 and STM1817.
Figure 4.
Hardware hookup
VCC VCC STM181x VCC MCU
(1)
RST VSS
Push-button (2) RESET
RESET Input VSS
AI09652a
1. RST for STM1812 and STM1817 (see Table 1). 2. Only valid for STM1813 and STM1818.
6/25
STM1810/1811/1812/1813/1815/1816/1817/1818
Description
1.1
Functional block diagrams
Figure 5. Push-pull active-low output (STM1810/1812/1815/1817)
VCC
VRST
COMPARE
trec Generator
RST(1)
AI09651a
1. RST for STM1812 and STM1817.
Figure 6.
Open drain, active-low output (STM1811/1816)
5.5 k(1) VCC VRST COMPARE trec Generator RST
AI09672
1. 5.5 k internal pull-up resistor.
Figure 7.
Open drain, active-low output (bidirectional, manual reset detect, STM1813/1818)
(1)
Push-button Detect VCC VRST COMPARE trec Generator
5.5 k
RST
AI09673
1. 5.5 k internal pull-up resistor.
1.2
Pin descriptions
See Figure 2 and Table 2 for a brief overview of the signals connected to this device.
1.2.1
Active-low RST output (push-pull)
Pulses low when VCC drops below VRST, and stays low as long as V CC is below the reset threshold. It remains low for trec after VCC rises above the reset threshold.
1.2.2
Active-low RST output (open drain)
Pulses low when VCC drops below VRST, and stays low as long as V CC is below the reset threshold. It remains low for trec after VCC rises above the reset threshold. RST output has an internal 5.5 k pull-up resistor.
7/25
Description
STM1810/1811/1812/1813/1815/1816/1817/1818
1.2.3
Active-high RST output (push-pull)
Pulses high when V CC drops below VRST, and stays high as long as V CC is below the reset threshold. It remains high for trec after VCC rises above the reset threshold.
1.2.4
Active-low RST output (open drain with internal 5.5 k pull-up) with manual reset detect
Pulses low when V CC drops below VRST, or RST is externally pulled low for at least 1.5 s. It remains low for tPBRST after VCC rises above the reset threshold, or after the external manual reset is released (see Figure 10). RST output has an internal 5.5 k pull-up resistor.
1.2.5
VCC
Supply voltage and input for VRST comparator.
1.2.6
VSS
Ground, is the reference for the power supply. It must be connected to the system ground. Table 3.
Pin 1 2 3
STM1810/STM1815
Name RST VCC VSS Active-low Reset Output (Push-pull) Supply Voltage and Input for Reset Threshold Monitor Ground Function
Table 4.
Pin 1 2 3
STM1811/STM1816
Name RST VCC VSS Function Active-low Reset Output (Open Drain, with internal 5.5 k pull-up resistor) Supply Voltage and Input for Reset Threshold Monitor Ground
Table 5.
Pin 1 2 3
STM1812/STM1817
Name RST VCC VSS Function Active-high Reset Output (Push-pull) Supply Voltage and Input for Reset Threshold Monitor Ground
Table 6.
Pin 1 2 3
STM1813/STM1818
Name RST VCC VSS Function Active-low Reset Output (Open Drain, with internal 5.5 k pull-up) with PushButton/Manual Reset Detect Supply Voltage and Input for Reset Threshold Monitor Ground
8/25
STM1810/1811/1812/1813/1815/1816/1817/1818
Operation
2
2.1
Operation
Reset output
The STM181x asserts a reset signal to the Microcontroller (MCU) whenever VCC goes below the reset threshold (VRST), and is guaranteed valid down to VCC = 1.0 V (0 C to 105 C). A microcontroller's (MCU) reset input starts the MCU in a known state. The STM1810 - STM1813/ STM1815 - STM1818 Low Power Reset circuits assert reset to prevent code-execution errors during power-up, power-down, and brownout conditions (Figure 8). During power-up, once VCC exceeds the reset threshold an internal timer keeps RST low for the reset time-out period, trec. After this interval, RST returns high. If V CC drops below the reset threshold, RST goes low. Each time RST is asserted, it stays low for at least the reset time-out period. Any time VCC goes below the reset threshold, the internal timer clears. The reset timer starts when VCC returns above the reset threshold. Reset trec is also triggered by an externally initiated rising edge on the RST pin (STM1813/STM1818), following a low signal of 1.5 s minimum duration.
2.2
Push-button detect reset (STM1813/1818)
Many systems require push-button reset capability (Figure 9), allowing the user or external logic circuitry to initiate reset. On the STM1813/STM1818, a logic low on RST held for greater than 1.5 s asserts a reset. RST deasserts following a 100 ms minimum reset timeout delay (trec). A manual reset input shorter than 1.5 s may release RST without the 100 ms minimum reset time-out delay. To facilitate use with mechanical switches, the STM1813/STM1818 contain internal debounce circuitry. A debounced waveform is shown in Figure 10 The RST output has an internal 5.5 k pull-up resistor.
2.3
Interfacing to bidirectional microcontrollers (MCU's)
As the RST output on the STM1811/STM1816 is open drain, these devices interface easily with MCU's that have bidirectional reset pins. Connecting the P supervisor's reset (RST) output directly to the microcontroller's reset (RST) pin allows either device to assert reset (Figure 11). No external pull-up resistor is required, as it is within the STM1811/STM1816.
2.4
Negative going VCC transients
The STM181x are relatively immune to negative-going V CC transients (glitches). Figure 20 shows typical transient duration versus reset comparator overdrive (for which the STM181x will NOT generate a reset pulse). The graph was generated using a negative pulse applied to VCC, starting at 0.5 V above the actual reset threshold and ending below it by the magnitude indicated (comparator overdrive). The graph indicates the maximum pulse width a negative V CC transient can have without causing a reset pulse. As the magnitude of the transient increases (further below the threshold), the maximum allowable pulse width decreases. Any combination of duration and overdrive which lies under the curve will NOT generate a reset signal. Typically, a VCC transient that goes 100 mV below the reset
9/25
Operation
STM1810/1811/1812/1813/1815/1816/1817/1818 threshold and lasts 20 s or less will not cause a reset pulse. A 0.1 F bypass capacitor mounted as close as possible to the V CC pin provides additional transient immunity.
2.5
Valid RST output down to VCC = 0 V
When VCC falls below 1 V, the RST output no longer sinks current, but becomes an open circuit. In most systems this is not a problem, as most MCUs do not operate below 1 V. However, in applications where RST output must be valid down to 0 V, a pull-down resistor may be added to hold the RST output low (see Figure 12). This resistor must be large enough to not load the RST output, and still be small enough to pull the output to ground. A 100 k resistor is recommended.
Note:
The same situation applies for the active-high RST of the STM1810/1812. A 100 k pull-up resistor to VCC should be used if RST must remain valid for VCC < 1.0 V. Figure 8.
VCC
Reset timing diagram
VRST
RST
VCC (min)
trec trec
RST
(1)
AI09653
1. RST for STM1812 and STM1817.
Figure 9.
Push-button manual reset with MR detect (STM1813/1818)
VCC STM1813 STM1818 Reset Monitor VCC 5.5 k Micro RESET RST Push-button RESET
VSS
AI09654
10/25
STM1810/1811/1812/1813/1815/1816/1817/1818
Operation
Figure 10. Manual reset timing diagram, switch bounce/debounce (STM1813/1818)
VCC
(Open)
tPBRST Switch Bounce
(Closed)
tPBRST
External Push-button RST
AI09655
Figure 11. Interfacing MCUs with bidirectional reset pins (RST, open drain, STM1811/1816)
VCC STM1811 STM1816 VCC 5.5 k RST Input VSS VCC MCU
RST VSS
AI09656
Figure 12. Valid reset (RST) output down to VCC = 0 V (push-pull)
VCC STM1810 STM1815 VCC VCC MCU RST RP(1) RST Input VSS
VSS
AI09657
1. ~100 k resistor recommended.
11/25
Operation
STM1810/1811/1812/1813/1815/1816/1817/1818 Figure 13. Valid reset (RST) output down to VCC = 0 V (push-pull)
VCC STM1812 STM1817 VCC VCC MCU RST RST Input VSS
RP(1)
VSS
AI09658
1. ~100 k resistor recommended.
12/25
STM1810/1811/1812/1813/1815/1816/1817/1818
Typical operating characteristics
3
Typical operating characteristics
Typical values are at TA = 25 C. Figure 14. Supply current vs. temperature (no load)
10
8
Supply Current (A)
6
4
VCC = 3 V VCC = 5 V
2
0 -40 -20 0 20 40 60 80 100
AI10402b
Temperature (C)
Figure 15. Normalized reset time-out period (trec) vs. temperature - VOD = VTH - V CC
155 153
Normalized Reset Time-out Period (ms)
151 149 147 145 143 141 139 137 135 -40
-20
0
20
40
60
80
100
AI10403b
Temperature (C)
13/25
Typical operating characteristics
STM1810/1811/1812/1813/1815/1816/1817/1818
Figure 16. VCC-to-reset output delay vs. temperature - VOD = VTH - VCC
5
4
VCC-to-/RST Delay (s)
3
2
1
0 -40
-20
0
20
40
60
80
100
AI10404b
Temperature (C)
Figure 17. Voltage output low vs. ISINK
0.20
0.16
Output Voltage (V)
0.12
0.08
0.04
0.00 0 3 6 9 12
AI10406b
Output Current (mA)
14/25
STM1810/1811/1812/1813/1815/1816/1817/1818 Figure 18. Voltage output high vs. ISOURCE
0.30 0.25
Typical operating characteristics
VCC - VOUT (V)
0.20
0.15 0.10 VCC = 3 V 0.05 0.00 0.0 0.5 1.0 1.5 2.0 2.5 3.0
AI10407b
Output Current (mA)
Figure 19. Normalized reset threshold vs. temperature
1.010
Normalized Reset Threshold
1.005
1.000
0.995
0.990 -40 -20 0 20 40 60 80 100
AI10405b
Temperature (C)
15/25
Typical operating characteristics
STM1810/1811/1812/1813/1815/1816/1817/1818
Figure 20. Max transient duration NOT causing reset pulse vs. reset threshold overdrive
50 45 40
Transient Duration (s)
35 30 25 20 15 10 5 0 10 100 1000
AI10408b
Reset Threshold Overdrive (mV)
1. Reset occurs above the line.
16/25
STM1810/1811/1812/1813/1815/1816/1817/1818
Maximum rating
4
Maximum rating
Stressing the device above the rating listed in Table 7 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 7.
Symbol TSTG TSLD(1) VIO VCC IO PD
Absolute maximum ratings
Parameter Storage Temperature (VCC Off) Lead Solder Temperature for 10 seconds Input or Output Voltage Supply Voltage Output Current Power Dissipation Value -55 to 150 260 -0.3 to VCC +0.3 -0.3 to 7.0 20 320 Unit C C V V mA mW
1. Reflow at peak temperature of 255 C to 260 C for < 30 seconds (total thermal budget not to exceed 180 C for between 90 to 150 seconds).
17/25
DC and AC parameters
STM1810/1811/1812/1813/1815/1816/1817/1818
5
DC and AC parameters
This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics Tables that follow, are derived from tests performed under the measurement conditions summarized in Table 8. Designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters. Table 8. Operating and AC measurement conditions
Parameter STM1810 - 1818 Unit
VCC Supply Voltage Ambient Operating Temperature (TA) Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref. Voltages
1.0 to 5.5 -40 to 105 5 0.2 to 0.8 VCC 0.3 to 0.7 VCC
V C ns V V
Figure 21. AC testing input/output waveforms
0.8 VCC
0.7 VCC 0.3 VCC
AI02568
0.2 VCC
18/25
STM1810/1811/1812/1813/1815/1816/1817/1818 Table 9.
Sym
DC and AC parameters
DC and AC characteristics
Alternative Description Test Condition(1) TA = 0 to +105 C TA = -40 to +105 C VCC = 3.6 V, No load VCC = 5.5 V, No load STM1813/1818 only STM1813/1818 only 0 < IOH < 500 A VCC VRST (max), Reset not asserted (STM1810/STM1815) VCC VRST (min), Reset asserted (STM1812/STM1817) VCC 2.7 V, Reset asserted, VOUT = 0.4 V (STM1810/1811/1813/1815/1816/1818) VCC 2.7 V, Reset not asserted, VOUT = 0.4 V, (STM1812/1817) Reset Thresholds STM181xL 25 C -40 to 105 C 25 C -40 to 105 C 25 C -40 to 105 C 25 C -40 to 105 C 25 C -40 to 105 C 2.47 2 100 150 2.80 2.55 2.64 5 200 2.98 2.88 2.97 4.25 3.06 3.15 4.50 4.37 4.49 4.62 4.75 V V V V V V V V V V s ms 10 VCC - 0.5 VCC - 0.1 350 350 0.7 VCC 0.4 Min 1.0 1.2 4 9 Typ Max Unit 5.5 5.5 10 16 V V A A V V V A A
VCC ICC VIH VIL VOH
Operating Voltage
VCC Supply Current Input High Voltage Input Low Voltage Output High Voltage RST Output Source Current RST Output Source Current RST Output Sink Current
IOH
mA
IOL RST Output Sink Current COUT Output Capacitance(2)
10 10
mA pF
STM181xM
VRST
Reset Threshold
STM181xT
STM181xS
STM181xR tRD trec tPB tPBRST VCC to RST Delay RST Pulse Width
VCC = (VTH + 100 mV) falling to (VTH - 200 mV) VCC Rising STM1813/1818 From Rising Edge STM1811/1816 STM1813/1818
Push-Button Reset Detect (STM1813, STM1818) Push-button Detect to RST Push-button RST Time-out Internal Pull-up Resistance 1.5 100 3.5 3.1 150 5.5 5.5 200 7.5 7.5 s ms k k
1. Valid for Ambient Operating Temperature: TA = -40 C to 105 C; VCC = 1.2 V to 5.5 V (except where noted). 2. The STM1811/1813/1816/1818 have an internal pull-up resistor which may sink 1 mA of current.
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Package mechanical
STM1810/1811/1812/1813/1815/1816/1817/1818
6
Package mechanical
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 22. SOT23-3 - 3-lead small outline transistor package outline
E E1
B 0.15
M
CAB
A1
1
e e1 D
0.20
M
CAB A
3X
0.10 C C
A2 A
3X b C
L1 L
SOT23-3
C
1. Drawing is not to scale.
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STM1810/1811/1812/1813/1815/1816/1817/1818 Table 10.
Symbol Typ A A1 A2 b C D E E1 e e1 L L1 Q N 0.54 0.40 0 3 0.60 8 Min 0.89 0.01 0.88 0.30 0.08 2.80 2.10 1.20 0.89 1.78 Max 1.12 0.10 1.02 0.50 0.20 3.04 2.64 1.40 1.03 2.05 0.021 Typ
Package mechanical
SOT23-3 - 3-lead small outline transistor package mechanical data
mm inches Min 0.035 0.001 0.035 0.012 0.003 0.110 0.083 0.047 0.035 0.070 Max 0.044 0.004 0.042 0.020 0.008 0.120 0.104 0.055 0.041 0.081
0.016 0 3
0.024 8
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Part numbering
STM1810/1811/1812/1813/1815/1816/1817/1818
7
Part numbering
Table 11.
Example:
Ordering information scheme
STM1810 L WX 7 F
Device Type STM181x
Reset Threshold Voltage STM1810 - 1813: L = V RST = 4.50 V to 4.75 V (4.62 V typ) M = V RST = 4.25 V to 4.49 V (4.37 V typ) STM1815 - 1818: T = V RST = 2.98 V to 3.15 V (3.06 V typ) S = V RST = 2.80 V to 2.97 V (2.88 V typ) R = V RST = 2.47 V to 2.64 V (2.55 V typ)
Package WX = SOT23-3
Temperature Range 7 = -40 to 105 C
Shipping Method F = ECOPACK Package, Tape & Reel
Note:
Contact the local ST sales office for availability. For other options, or for more information on any aspect of this device, please contact the ST Sales Office nearest you.
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STM1810/1811/1812/1813/1815/1816/1817/1818 Table 12. Marking description
Reset Threshold 4.62 V 4.37 V 4.62 V 4.37 V 4.62 V 4.37 V 4.62 V 4.37 V 3.06 V 2.88 V 2.55 V 3.06 V 2.88 V 2.55 V 3.06 V 2.88 V 2.55 V 3.06 V 2.88 V 2.55 V Output Push-pull RST Push-pull RST Open Drain RST Open Drain RST Push-pull RST Push-pull RST Open Drain RST Open Drain RST Push-pull RST Push-pull RST Push-pull RST Open Drain RST Open Drain RST Open Drain RST Push-pull RST Push-pull RST Push-pull RST Open Drain RST Open Drain RST Open Drain RST
Part numbering
Part Number STM1810L STM1810M STM1811L STM1811M STM1812L STM1812M STM1813L STM1813M STM1815T STM1815S STM1815R STM1816T STM1816S STM1816R STM1817T STM1817S STM1817R STM1818T STM1818S STM1818R
Topside Marking(1) 9AAx 9ABx 9AHx 9AJx 9AQx 9ARx 9AXx 9AYx 9BGx 9BHx 9BJx 9BPx 9BQx 9BRx 9BWx 9BXx 9BYx 9CDx 9CEx 9CFx
1. x = letter assigned to indicate assembly work week (i.e., A = WW01 and WW02, B = WW03 and WW04, C = WW05 and WW06..., Z = WW51, WW52, and WW53).
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Revision history
STM1810/1811/1812/1813/1815/1816/1817/1818
8
Revision history
Table 13.
Date 26-Aug-04 05-Oct-04
Document revision history
Revision 1.0 2.0 First Issue. Update reset characteristics, add typical graphs, remove SC70 references (Figure , 2, 4, 7, 11, 12, 14, 15, 16, 17, 18, 19, 20; and 21, Table 9, 11, and 12). Update dimensions (Table 10). Remove some voltage options (Table 1, 10, 11, and 12). Temperature range change (Figure 14, 15, 16, and 19; Table 8, 9, and 11). Update typical operating characteristics, Lead-free text (Figure 14, 15, 16, 17, 18, 19, and 20; Table 11, and 12). Document reformatted. Update Table 12. Changes
19-Nov-04 07-Dec-04 29-Jun-05 11-Oct-05 28-Aug-2007
3.0 4.0 5.0 6.0 7
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STM1810/1811/1812/1813/1815/1816/1817/1818
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